A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications
Published in 2022 IEEE International Solid-State Circuits Conference (ISSCC), 2022
Recommended citation: Yan, B., Hsu, J. L., Yu, P. C., Lee, C. C., Zhang, Y., Yue, W., ... & Huang, R. (2022, February). A 1.041-Mb/mm 2 27.38-TOPS/W signed-INT8 dynamic-logic-based ADC-less SRAM compute-in-memory macro in 28nm with reconfigurable bitwise operation for AI and embedded applications. In 2022 IEEE International Solid-State Circuits Conference (ISSCC) (Vol. 65, pp. 188-190). IEEE.
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